HN4B102J 2013-11-01 1 toshiba transistor silicon pnp / npn epit axial type (pct process) HN4B102J mos gate drive applications switching applications ? small footprint due to a small and thin package ? high dc current gain : pnp h fe = 200 to 500 (i c =0.2 a) : npn h fe = 200 to 500 (i c = 0.2 a) ? low collector-emitter saturation : pnp v ce (sat) =0.20 v (max) : npn v ce (sat) = 0.14 v (max) ? high-speed switching : pnp t f = 40 ns (typ.) : npn t f = 45 ns (typ.) absolute maximum ratings (ta = 25c) rating characteristic symbol pnp npn unit collector-base voltage v cbo ? 30 60 v collector-emitter voltage v ceo ? 30 30 v emitter-base voltage v ebo ? 7 7 v dc (note 1) i c ? 1.8 2.0 collector current pulse (note 1) i cp ? 8.0 8.0 a base current i b ? 0.5 0.5 a collector power dissipation (t = 10 s) single-device operation p c (note 2) 1.1 w collector power dissipation (dc) single-device operation p c (note 2) 0.75 w junction temperature t j 150 c storage temperature range t stg ? 55 to 150 c note 1: ensure that the channel temperature does not exceed 150c during use of the device. note 2: mounted on an fr4 board (glass-epoxy; 1.6 mm thick; cu area, 645 mm 2 ) note 3: using continuously under heavy loads (e.g. t he application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temper ature/current/voltage, etc. ) are within the absolute maximum ratings. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook (?handling precautions?/derating concept and methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). figure 1 circuit configuration (top view) figure 2 marking unit: mm jedec D jeita D toshiba 2-3l1a weight: 0.014g (typ.) 1 0~0.1 +0.2 1.1 -0.1 2.9 0.2 1.9 0.2 0.95 0.95 2 3 4 5 +0.2 1.6 -0.1 +0.2 2.8 -0.3 +0.1 0.16 -0.06 0.4 0.1 1 0~0.1 +0.2 1.1 -0.1 2.9 0.2 1.9 0.2 0.95 0.95 2 3 4 5 +0.2 1.6 -0.1 +0.2 2.8 -0.3 +0.1 0.16 -0.06 0.4 0.1 1. base (q1 pnp) 2. emitter (q1 pnp/q2 npn) 3. base (q2 npn) 4. collector (q2 npn) 5. collector (q1 pnp) part no. (or abbreviation code) 5 l q1 (pnp) q2 (npn) start of commercial production 2007-02
HN4B102J 2013-11-01 2 electrical characteristics (ta = 25c) pnp characteristic symbol test condition min typ. max unit collector cut-off current i cbo v cb = ?30 v, i e = 0 ? ? ? 100 na emitter cut-off current i ebo v eb = ?7 v, i c = 0 ? ? ? 100 na collector-emitter breakdown voltage v (br) ceo i c = ?10 ma, i b = 0 ?30 ? ? v h fe (1) v ce = ?2 v, i c = ?0.2 a 200 ? 500 h fe (2) v ce = ?2 v, i c = ?0.6 a 125 ? ? dc current gain h fe (3) v ce = ?2 v, i c = ?2.0 a 40 ? ? collector-emitter saturation voltage v ce (sat) i c = ?0.6 a, i b = ?20 ma ? ? ? 0.20 v base-emitter saturation voltage v be (sat) i c = ?0.6 a, i b = ?20 ma ? ? ? 1.10 v collector output capacitance c ob v cb = ?10 v, i e = 0, f = 1mhz ? 16.5 ? pf rise time t r ? 40 ? storage time t stg ? 280 ? switching time fall time t f see figure 3 circuit diagram v cc i P ?18 v, r l = 30 i b1 = i b2 = 20 ma ? 40 ? ns npn characteristic symbol test condition min typ. max unit collector cut-off current i cbo v cb = 60 v, i e = 0 ? ? 100 na emitter cut-off current i ebo v eb = 7 v, i c = 0 ? ? 100 na collector-emitter breakdown voltage v (br) ceo i c = 10 ma, i b = 0 30 ? ? v h fe (1) v ce = 2 v, i c = 0.2 a 200 ? 500 h fe (2) v ce = 2 v, i c = 0.6 a 125 ? ? dc current gain h fe (3) v ce = 2 v, i c = 2.0 a 40 ? ? collector-emitter saturation voltage v ce (sat) i c = 0.6 a, i b = 20 ma ? ? 0.14 v base-emitter saturation voltage v be (sat) i c = 0.6 a, i b = 20 ma ? ? 1.10 v collector output capacitance c ob v cb = 10 v, i e = 0, f = 1mhz ? 14 ? pf rise time t r ? 45 ? storage time t stg ? 580 ? switching time fall time t f see figure 4 circuit diagram v cc P 18 v, r l = 30 i b1 = i b2 = 20 ma ? 45 ? ns figure 3. switching time test circuit & timing chart figure 4. switching time test circuit & timing chart duty cycle 1% duty cycle 1% ib1 ib2 rl vcc ib1 20s ib2 ib1 ib2 rl vcc ib1 20s ib2 input output input output
HN4B102J 2013-11-01 3 pnp safe operating area -10 -0.01 -1 -0.1 collector current i c (a) collector ? emitter voltage v ce (v) -0.1 -1 -10 -100 -1 -0.01 -0.1 -0.001 -0.01 -0.1 -1 -10 0 -0.4 -0.8 -1.6 -1.2 -2 0 -0.4 -0.8 -2 0 0 -2 -0.4 -0.4 -0.8 -1.2 -1.6 -0.8 -1.2 -1.6 100 1000 -0.001 -0.01 -0.1 -1 -10 -0.1 -1 -10 -0.001 -0.01 -0.1 -1 -10 10 -0.3 -3 -1.2 -1.6 collector ? emitter voltage v ce (v) i c ? v ce collector current i c (a) common emitter ta = 25c single nonrepetitive pulse -10 -8 -3 i b =? 1 ma -20 -5 -6 -4 -2 ta = 100c ? 55c 25c collector current i c (a) h fe ? i c dc current gain h fe common emitter v ce = ? 2 v single nonrepetitive pulse 30 300 ta = 100c ? 55c 25c collector current i c (a) v ce (sat) ? i c collector ? emitter saturation voltage v ce (sat) (v) common emitter i c /i b = 30 single nonrepetitive pulse 100c 25c collector current i c (a) v be (sat) ? i c common emitter i c /i b = 30 single nonrepetitive pulse ? 55c ta = 100c 25c collector current i c (a) base ? emitter voltage v be (v) i c ? v be common emitter v ce = ? 2 v single nonrepetitive pulse -0.03 -0.3 base ? emitter saturation voltage v be (sat) (v) ta = -55c * : single nonrepetitive pulse ta = 25c note that the curves for 100 ms, 10 s and dc operation will be different when the devices aren?t mounted on an fr4 board (glass-epoxy, 1.6 mm thick, cu area: 645 mm 2 ). single-device operation these characteristic curves must be derated linearly with increase in temperature. 1 ms* 10 ms* i c max (pulse) * dc operation ta = 25c i c max (continuous)* 10 s* i c max (pulse) * 100 ms* v ceo max 10 s* 100 s*
HN4B102J 2013-11-01 4 npn safe operating area * : single nonrepetitive pulse ta = 25c note that the curves for 100 ms, 10 s and dc operation will be different when the devices aren?t mounted on an fr4 board (glass-epoxy, 1.6 mm thick, cu area: 645 mm 2 ). single-device operation these characteristic curves must be derated linearly with increase in tem p erature. 1 ms* 10 ms* i c max (pulse) * dc operation ta = 25c i c max (continuous)* 10 s* i c max (pulse) * 100 ms* v ceo max 10s* 100s* 10 0.01 1 0.1 collector current i c (a) collector ? emitter voltage v ce (v) 0.1 1 10 100 1 0.01 0.1 0.001 0.01 0.1 1 10 0 0.4 0.8 1.6 1.2 2 0 0.4 0.8 2 0 0 2 0.4 0.4 0.8 1.2 1.6 0.8 1.2 1.6 100 1000 0.001 0.01 0.1 1 10 0.1 1 10 0.001 0.01 0.1 1 10 10 0.3 3 1.2 1.6 collector ? emitter voltage v ce (v) i c ? v ce collector current i c (a) common emitter ta = 25c single nonrepetitive pulse 10 8 3 i b = 1 ma 20 5 6 4 2 ta = 100c ? 55c 25c collector current i c (a) h fe ? i c dc current gain h fe common emitter v ce = 2 v single nonrepetitive pulse 30 300 ta = 100c ? 55c 25c collector current i c (a) v ce (sat) ? i c collector ? emitter saturation voltage v ce (sat) (v) common emitter i c /i b = 30 single nonrepetitive pulse 100c 25c collector current i c (a) v be (sat) ? i c common emitter i c /i b = 30 single nonrepetitive pulse ? 55c ta = 100c 25c collector current i c (a) base ? emitter voltage v be (v) i c ? v be common emitter v ce = 2 v single nonrepetitive pulse 0.03 0.3 base ? emitter saturation voltage v be (sat) (v) ta = -55c
HN4B102J 2013-11-01 5 common curves apply only to limited areas of thermal resistance. single nonepetitive pulse ta = 25c mounted on an fr4 board (glass-epoxy; 1.6 mm thick; cu area, 645 mm 2 ) single-device operation transient thermal resistance r th (j-a) (c/w) 1 10 100 0.001 0.01 0.1 1 100 10 1000 pulse width t w (s) r th t w 1000
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